Index Catalog // ScholarsArchive@OSU

Analysis and design of CMOS RF LNAs with ESD protection

Creator:: Chandrasekhar, Vinay
Abstract:: An analysis that accounts for the effect of standard electrostatic discharge (ESD) structures on critical LNA specifications of noise figure, input matching and gain is presented. It is shown that the ESD structures degrade LNA performance particularly for higher frequency applications. Two LNAs, one with ESD protection and one without,...
Resource Type:: Masters Thesis

Algorithms and simulators for coupled device/circuit simulation

Creator:: Dudar, Taras
Abstract:: Algorithms and simulators comprised of SPICE3 as a circuit level simulator and two device simulators EOFLOW and PROPHET for accurate simulation of new types of devices are presented in this thesis. An integration of EOFLOW with SPICE3 creates a capability for efficient simulation of a system containing interconnected electroosmotic flow...
Resource Type:: Masters Thesis

Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates

Creator:: Sharma, Ajit
Abstract:: This thesis presents an automated methodology to calibrate the substrate profile for accurate prediction of substrate parasitics using Green's function based extractors. The technique requires fabrication of only a few test structures and results in an accurate three layered approximation of a heavily doped epitaxial silicon substrate. The obtained substrate...
Resource Type:: Masters Thesis

Substrate coupling macromodel for lightly doped CMOS processes

Creator:: Koteeswaran, Mohanalakshmi
Abstract:: A scalable macromodel for substrate noise coupling in lightly doped substrates with and without a buried layer has been developed. This model is based on Z-parameters and is scalable with contact size and separation. This model requires process dependent parameters that can be extracted easily from a small number of...
Resource Type:: Masters Thesis

Layout dependent and bias independent scalable substrate model for RF MOSFETs

Creator:: Suravarapu, Ravikanth
Abstract:: The dependence of the substrate resistance, R[subscript sub], for MOS transistor RF modeling on transistor biasing and layout is studied from device simulations and measurements. Though R[subscript sub] is found to be bias dependent, the error incurred by assuming a constant value equal to the DC resistance is not significant....
Resource Type:: Masters Thesis

Algorithms and tools for optimization of integrated RF VCOs

Creator:: Kratyuk, Volodymyr
Abstract:: This thesis presents algorithms and tools for the automated design of RF LC CMOS voltage controlled oscillators (VCOs) with low phase noise given a set of specifications. The electromagnetic solver, ASITIC, combined with the circuit simulator, SpectreRF, allows optimization of the VCO circuit parameters and inductor layout. This approach gives...
Resource Type:: Masters Thesis

Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates

Creator:: Hsu, Shu-ching
Abstract:: This thesis examines substrate noise coupling for NMOS transistors in heavily doped substrates. The study begins with the analysis of an NMOS transistor switching noise in a digital inverter at the device level. A resistive substrate network for the NMOS transistor is proposed and verified. Coupling between N+- P+ contacts...
Resource Type:: Masters Thesis

Steady-state analysis techniques for coupled device and circuit simulation

Creator:: Hu, Yutao
Abstract:: The focus of this work is on the steady-state analysis of RE circuits using a coupled device and circuit simulator. Efficient coupling algorithms for both the time-domain shooting method and the frequency-domain harmonic balance method have been developed. A modified Newton shooting method considerably improves the efficiency and reliability of...
Resource Type:: Dissertation

Contributions to substrate noise due to supply coupling and pin parasitics

Creator:: Adluri, Sirisha
Abstract:: This thesis presents the contributions to substrate noise due to supply coupling and the effect of pin parasitics on the substrate noise generated by digital circuits. Various sources of substrate noise and their effect on analog circuits sharing the same substrate are discussed. A simulation approach to isolate the various...
Resource Type:: Masters Thesis

Prediction of phase noise and jitter in ring oscillators

Creator:: Barton, Nathen
Abstract:: This thesis presents distinctly different methods of accurately predicting phase noise and absolute jitter in ring oscillators. The phase noise prediction methods are the commercially available SpectreRF and isf_tool, a simulator developed in this work from the Hajimiri and Lee theory of phase noise. Absolute jitter due to deterministic supply...
Resource Type:: Masters Thesis

A methodology for efficient substrate noise estimation from large scale digital circuits in mixed signal SoC's

Creator:: Held, Martin A.
Abstract:: A methodology for rapid estimation of substrate noise generated by digital circuitry in mixed-signal circuits is presented. This methodology is incorporated into the Silencer! framework, and also provides for future improvements including pre-layout noise estimation. Measurements of a test chip fabricated in the TSMC o.25[mu]m heavily doped logic process validate...
Resource Type:: Masters Thesis

A comparison of substrate noise coupling in heavily doped and lightly doped substrates for mixed-signal circuits

Creator:: Ayers, James S.
Abstract:: An analysis of substrate noise coupling in mixed-signal circuits has been performed in the TSMC 0.25 [mu]m lightly doped and heavily doped CMOS processes. Methods to minimize noise coupling in both the chip design and board design phases are presented along with techniques for accurate circuit simulation of noise coupling....
Resource Type:: Masters Thesis

Accurate and efficient simulation of synchronous digital switching noise in system on a chip

Creator:: Habal, Husni
Abstract:: A new method is presented to compress switching information in large digital circuits. This is combined with an efficient approach of generating the noise signatures of cells in a digital library that results in an accurate and efficient approach for estimating the noise generated in digital circuits. This method provides...
Resource Type:: Masters Thesis

Efficient RF energy scavenging and ultra-low power management for powering wireless sensor nodes

Creator:: Arumugam, Vikrant P.
Abstract:: As the demand for real-time information in engineering and health care systems keeps increasing, the need for wireless sensor nodes is also continuously increasing. As a result, the cost and effort involved in installing and maintaining batteries to power the numerous sensor nodes is growing exponentially. Providing a cost effective...
Resource Type:: Masters Thesis

A nano-power wake-up circuit for RF energy harvesting wireless sensor networks

Creator:: Lindsley, Christopher J.
Abstract:: A fully integrated CMOS latched comparator is presented for use as a wake-up circuit that is attached to an RF energy harvester in a battery free wireless sensor network. The system consumes less than 36nA static current at 20°C and dissipates 2pJ of energy per conversion. The comparator comprises of...
Resource Type:: Masters Thesis

A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4 GHz LNA's

Creator:: Hazenboom, Duncan S.
Abstract:: Three types of low noise amplifiers operating at 2.4GHz were designed. They are the commonly used single-ended and differential amplifiers as well as a new quasi-differential amplifier. The substrate noise injected into these amplifiers is examined for both heavily and lightly doped CMOS substrates. For the single-ended amplifier the noise...
Resource Type:: Masters Thesis

Simulation, measurement, and suppression of digital noise in mixed-signal integrated circuits

Creator:: Owens, Brian E.
Abstract:: Strategies for simulation and measurement of substrate noise have been analyzed using various digital and analog circuits fabricated in the TSMC 0.35um heavily doped CMOS process. The measurements validate a substrate noise coupling macromodel that has been used to obtain the simulation results. The simulations and measurements also substantiate the...
Resource Type:: Masters Thesis

Silencer! : a tool for substrate noise coupling analysis

Creator:: Birrer, Patrick
Abstract:: This thesis presents Silencer!, a fully automated, schematic-driven tool for substrate noise coupling simulation and analysis. It has been integrated in the CADENCE DFII environment and seamlessly enables substrate coupling analysis in a standard mixed-signal design flow. Silencer! aids IC designers in the analysis of substrate noise coupling at different...
Resource Type:: Masters Thesis

Coupled circuit and device simulations for design of RF MEMS VCOs

Creator:: Behera, Manas
Abstract:: A new coupled circuit and electrostatic/mechanical simulator (COSMO) for the design of RF MEMS VCOs is presented in this thesis. The numerical solution of device level equations is used to accurately compute the capacitance of a MEMS capacitor. This coupled with a circuit simulator facilitates the simulation of circuits incorporating...
Resource Type:: Masters Thesis

Frequency domain steady-state simulation of oscillators

Creator:: Duan, Xiaochun
Abstract:: The focus of this work is on developing algorithms for frequency domain steady-state analysis of oscillators. Convergence problems associated with the frequency domain harmonic balance simulation of oscillators have been examined. Globally convergent homotopy methods have been combined with the harmonic balance method for robust high-Q oscillator simulation. Various homotopy...
Resource Type:: Dissertation

ScholarsArchive@OSU

Analysis and design of CMOS RF LNAs with ESD protection

Algorithms and simulators for coupled device/circuit simulation

Predictive methodologies for substrate parasitic extraction and modeling in heavily doped CMOS substrates

Substrate coupling macromodel for lightly doped CMOS processes

Layout dependent and bias independent scalable substrate model for RF MOSFETs

Algorithms and tools for optimization of integrated RF VCOs

Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates

Steady-state analysis techniques for coupled device and circuit simulation

Contributions to substrate noise due to supply coupling and pin parasitics

Prediction of phase noise and jitter in ring oscillators

A methodology for efficient substrate noise estimation from large scale digital circuits in mixed signal SoC's

A comparison of substrate noise coupling in heavily doped and lightly doped substrates for mixed-signal circuits

Accurate and efficient simulation of synchronous digital switching noise in system on a chip

Efficient RF energy scavenging and ultra-low power management for powering wireless sensor nodes

A nano-power wake-up circuit for RF energy harvesting wireless sensor networks

A comparison of substrate noise coupling in lightly and heavily doped CMOS processes for 2.4 GHz LNA's

Simulation, measurement, and suppression of digital noise in mixed-signal integrated circuits

Silencer! : a tool for substrate noise coupling analysis

Coupled circuit and device simulations for design of RF MEMS VCOs

Frequency domain steady-state simulation of oscillators

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