Wireless technologies advance rapidly in the recent time. The maJor initiative is the realization of the third generation wireless network that provides high bandwidth access to digital data on the Internet. Moreover, recent improvements in computer and embedded systems have enabled portable devices with sufficiently high computing capability.
The combination...
The AE32000 processor core, developed by Advanced Digital Chips Inc., Korea, is used primarily in the embedded processing environment. The AE32000 simulator models this embedded processor core having high code density. An enhanced simulator was developed to study the performance of the present Instruction Set Architecture after comparison with the...
The growth of applications for embedded processors has spawned a need for highly configurable devices. Custom microprocessors have long life cycles for a fast paced market, where as off-the-shelf designs often do not provide the level of configuration, nor the ability to allow system-on-chip designs. This paper presents a description...
The purpose of this thesis is to explore the design of a multimedia extension Instruction Set Architecture (ISA) for a reconfigurable processor. An Extendable Multimedia Module (EM3) was designed as an optional module for X32V. X32V is a prototype configurable processor simulator developed at Oregon State University by John Mark...
Embedded processors are utilized in many applications with considerable time spent developing and maintaining functionality and performance. Performance being a key factor in adding features such as video and audio to a product. Configurable processors, such as X32V, allow the addition of functionality and performance without large increases in design...
A Mobile Ad-hoc NETwork (MANET) is collection of wireless mobile nodes without a network infrastructure or centralized administration. Although MANETs can be used in many applications, such as mobile Internet, military communication, and disaster relief networks, a number of challenges remain. These include routing, medium access control, security, scalability, energy...
This thesis work evaluates the need for a re-configurable cross compiler for the X32V processor architecture and discusses the process of developing a cross compiler for X32V. X32V is a new processor intended at the embedded applications domain whose instruction set is designed based on the widely used MIPS processor....
Rapid advances in wireless networking have led to more mobile phones, PDAs, and other digital mobile devices becoming ubiquitously connected to the Internet. As the demand of delay sensitive real-time applications for these portable devices increases, providing seamless connectivity to wireless networks becomes a critical issue. For this reason, a...
This thesis investigates Dynamic Voltage Scaling (DVS) techniques to lower power consumption in video decoding. A DVS scheme called the Frame-data Computation Aware (FDCA) method has been presented. This method is adaptable not only to stored video applications but also to real-time video scenarios. Unlike DVS schemes for video decoding...
General purpose computer systems have seen increased performance potential through the parallel processing capabilities of multicore processors. Yet this potential performance can only be attained through parallel applications, thus forcing software developers to rethink how everyday applications are designed. The most readily form of Thread Level Parallelism (TLP) within any...