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Filtering by: Creator Dale, A. C. Remove constraint Creator: Dale, A. C. Academic Affiliation Electrical Engineering and Computer Science Remove constraint Academic Affiliation: Electrical Engineering and Computer Science Committee Member Nguyen, Thinh Remove constraint Committee Member: Nguyen, Thinh

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  • Power efficient H.264 video decoding in embedded multiprocessor

    Creator:
    Kim, Jihong
    Abstract:
    This thesis presents a novel methodology that enables power efficient video decoding in an embedded system based on MPSoC (Multiprocessor System on Chip). This methodology is a physical combination of parallel processing which reduces power consumption of processors by exploiting thread-level parallelism and Dynamic Voltage Frequency Scaling (DVFS) that allows...
    Resource Type:
    Masters Thesis
    Full Text:
    availability of left samples (I, J, K, L), upper samples (A, B, C, D) and upper-right samples (E, F, G, H) as

  • Low-power successive approximation analog to digital converter with digital calibration

    Creator:
    Li, Wei
    Abstract:
    IC designers are continuously facing the challenges from reduced CMOS feature sizes and supply voltages. ADCs that deliver satisfactory resolutions/speeds while utilizing the state-of-the-art technologies to save power are in high demand. The analog circuits are more and more assisted by various digital calibration techniques to get boosted performances. This...
    Resource Type:
    Dissertation
    Full Text:
    ," ISSCC 2011, pp. 190-192, Feb. 2011. [1-11] K. Doris, E. Janssen, C. Nani, A. Zanikopoulos, and G. van

  • Power Efficient Architectures for Medium-high Resolution Analog-to-Digital Converters

    Creator:
    Sadollahi, Mahmoud
    Abstract:
    Analog-to-digital converters are essential components to the portable devices that we are using today. Wireless sensors, body implanted devices, communication devices and so forth require low power ADCs. Therefore achieving higher resolution and bandwidth with lower power consumption is targeted in ADCs design. In this work power efficient ADCs for...
    Resource Type:
    Dissertation
    Full Text:
    parasitic capacitor is CphVref/Ctot, and resulting error will be: ph ref ph A err tot C V C V V C

  • Linearity enhancement techniques for data converters

    Creator:
    Cao, Jinzhou
    Abstract:
    Data converters are essential interface circuits between the analog world that people live in and the digital processors that people live with. Linearity, which often is a tradeoff against other performance criteria, is one of the major performance demands from applications for both analog-to-digital converts (ADC) and digital-to-analog converters (DAC)....
    Resource Type:
    Dissertation
    Full Text:
    . ............................................................................................. 68 Figure 4.5: INL curves for (a) uncompensated condition, (b) radix-based algorithm, (c

  • Dynamic Error Calibration for Continuous-Time Delta-Sigma Modulator with Multi-GHz Sampling Rate

    Creator:
    He, Tao
    Abstract:
    Continuous-time ΔΣ modulators are widely used in cellular handsets due to their power efficiency and inherent anti-aliasing characteristics. To achieve demanding cellular bandwidth requirements while maintaining good power efficiency, multi-bit feedback is typically used. This approach provides benefits such as lower OSR, relaxed loop filter requirements, and reduced jitter sensitivity....
    Resource Type:
    Dissertation
    Full Text:
    ............................................................... 6 2.3 Different DSM topologies (a) feedback (b) feedforward (c) feedback-feedforward hybrid

  • Design techniques for low power high speed successive approximation analog-to-digital converters

    Creator:
    Lin, Jiaming
    Abstract:
    This dissertation presents two high-speed pipeline successive approximation analog-to-digital converters (SAR ADCs). Capacitive DACs and resistive DACs are utilized in these two pipeline SAR ADCs, respectively. The pipeline SAR ADC with capacitive DACs can save 50% switching power compared with other time-interleaved SAR ADCs since the total capacitance of the...
    Resource Type:
    Dissertation
    Full Text:
    connection status of the sampling capacitor at (a) Φ1; (b) ΦF; (c) Φ2. .. 22 Fig. 2-12. The voltage

  • A high power emulation of a wind farm

    Creator:
    Lalla, Chelsea
    Abstract:
    As more wind farms are connected to the grid, the variable nature of wind energy begins to influence grid stability. Energy storage could help smooth the variable nature of wind energy. Laboratory demonstration and exploration of the interaction between different energy storage devices and wind energy could help improve and...
    Resource Type:
    Masters Thesis
    Full Text:
    rr en t (a m ps ) phase current A phase current B phase current C Figure 3.7: Phase

  • Design techniques for wideband low-power Delta-Sigma analog-to-digital converters

    Creator:
    Wang, Yan
    Abstract:
    Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs) are traditionally used in high quality audio systems, instrumentation and measurement (I&M) and biomedical devices. With the continued downscaling of CMOS technology, they are becoming popular in wideband applications such as wireless and wired communication systems,high-definition television and radar systems. There are two general realizations...
    Resource Type:
    Dissertation
    Full Text:
    : _____________________________________________________________________ Gábor C. Temes Pavan Kumar Hanumolu Delta-Sigma (ΔΣ) analog-to-digital converters (ADCs

  • On edge disjoint Hamiltonian cycles in torus and Gaussian networks

    Creator:
    Alazemi, Fawaz M.
    Abstract:
    Many algorithms in parallel systems can be easily solved if we can generate a Hamiltonian cycle on the underly network. Finding Hamiltonian cycle is a well known NP-complete problem. For specific instances of regular graphs, such as Torus and Gaussian network, one can easily find Hamiltonian cycles. In this thesis,...
    Resource Type:
    Masters Thesis
    Full Text:
    ) Graph G2 0 1 2 3 a b a0 a1 a2 a b0 b1 b2 b3 (c) G1 ⊗G2 cross product Figure 2.1: An example of

  • The dynamic speculation and performance prediction of parallel loops

    Creator:
    Zier, David A.
    Abstract:
    General purpose computer systems have seen increased performance potential through the parallel processing capabilities of multicore processors. Yet this potential performance can only be attained through parallel applications, thus forcing software developers to rethink how everyday applications are designed. The most readily form of Thread Level Parallelism (TLP) within any...
    Resource Type:
    Dissertation
    Full Text:
    overhead, and irregular loop structures. c©Copyright by David A. Zier May 1, 2009 All Rights Reserved